1) Field of the Invention
The present invention relates to the manufacture of integrated circuits, and more specifically, to methods, apparatus and systems for forming fluorinated silicate glass (“FSG”) films and silicon nitride (SiN) with improved characteristics in a high-density-plasma chemical-vapor-deposition (“HDP-CVD”) environment.
2) Description of the Prior Art
In conventional integrated circuit fabrication, circuit elements are formed by etching a pattern of gaps in a layer of metal such as aluminum. The gaps are then filled with a dielectric such as silicon dioxide. Copper is poised to take over as the main on-chip conductor for all types of integrated circuits because of its lower resistance when compared to conventional aluminum alloys. Because it is difficult to etch copper, however, damascene processes have been developed for fabricating copper-based integrated circuits. In damascene processes, dielectric layers are deposited and then etched to form gaps that are subsequently filled with copper.
Fluorine-doped silicon oxide, also known as fluorosilicate glass, is an attractive solution to replace conventional silicon dioxide as intermetal dielectrics for damascene structures. FSG can be deposited in conventional HDP-CVD systems, which have been widely used for undoped silicate glass (USG) and FSG dielectrics in aluminum interconnects. FSG generally has a good process scheme in terms of reliability, stability, and throughput. Furthermore, the electrical performance of integrated circuits can be significantly improved due to the lower dielectric constant of FSG (3.4-3.7 compared to 4.1 for conventional silicon oxides). The lower dielectric constant reduces the capacitance between metal lines in the same layer and reduces cross talk across layers.
Unfortunately, the formation of FSG films raises other issues. First, blanket deposition of FSG films typically have a dielectric constant of about 3.7. It is desirable, in some instances, to further reduce this dielectric constant to improve device quality and performance.
Second, FSG layer integration problems have arisen as a result of the process recipe. Dielectric films used in damascene processes utilize a layer known as an etch stop to provide for selective etching of the film. Silicon nitride (Six Ny) is commonly used as an etch stop in damascene applications, for example when forming vias between layers containing metal lines. In the past, there have been problems in obtaining good adhesion between the silicon nitride and an underlying or overlying layer of FSG. Specifically, the FSG tends to outgas at temperatures of about 450 C. forming “bubbles” in an overlying SixNy layer. The bubbles lead to delamination of the SixNy.
Previous attempts to improve the adhesion by, for example, reducing the fluorine content in the FSG merely postpone the delamination. Similarly, other problems arise when, in an attempt to reduce the hydrogen content in the FSG film, the hydrogen source is reduced (e.g., the amount of silane is reduced). In some cases, FSG deposition using SiF4 without SiH4 has a lower deposition rate than FSG deposition with both SiF4 and SiH4. Furthermore, SiF4 tends to be destructive to ceramic components of the chamber. Using SiH4 with the SiF4 tends to mitigate the destructive effects of SiF4. Hence, reductions in silane result in increased degradation of chamber components.
When FSG films are deposited on a silicon nitride barrier layer in damascene or dual damascene applications, failure to integrate the FSG with the barrier layers poses a significant obstacle in the widespread acceptance of FSG as an adequate low-k dielectric material.
Therefore, a need exists in the art for a method of depositing an FSG film with improved integration and stability. Further, a need exists to further lower the dielectric constant in the FSG film
The relevant technical developments in the patent literature can be gleaned by considering the following.
U.S. Pat. No. 6,511,922 Krishnaraj et al.—shows HDPCVD FSG and SIN processes. Also see related patent U.S. Pat. No. 6,633,076B2(Krishnaraj et al.)
U.S. Pat. No. 6,740,601—T an, et al. May 25, 2004—HDP-CVD deposition process for filling high aspect ratio gaps.
U.S. Pat. No. 6,667,248—M'Saad, et al.—shows a fluorinated silicate glass layer is deposited onto the substrate using the high-density plasma.
U.S. Pat. No. 6,383,954—Wang, et al. May 7, 2002—Process gas distribution for forming stable fluorine-doped silicate glass and other films.
U.S. Pat. No. 6,323,119—Xi, et al. Nov. 27, 2001—CVD deposition method to improve adhesion of F-containing dielectric metal lines for VLSI application.
U.S. Pat. No. 6,489,230—Huang Dec. 3, 2002—Integration of low-k SiOF as inter-layer dielectric.
U.S. Pat. No. 6,593,650 (Towle et al. ) shows a HDP FSG process.
U.S. Pat. No. 6,468,927 (Zhang et al.) shows a HDPCVD FSG process with N2 doping.
U.S. Pat. No. 6,303,518B1—Tain et al.—discusses HPDCVD FSG processes.